1. Field of the Invention
This application relates generally to block code decoders, and, more specifically, to increasing the number of correctable errors in such decoders.
2. Related Art
A forward error correction code is a code applied to encode source information at the transmitter so that errors introduced by transmission over the communications channel can be corrected through corresponding decoding performed at the receiver. To increase the error detection and correction capability of the code, it is common to apply combinations of codes, a process which is often referred to as code concatenation. In one example of code concatenation, an outer code is first applied to encode the source information, and then an inner code is applied to further encode the information. The inner and outer codes can be selected to address different classes of errors or complement one another in other ways.
FIG. 1 illustrates an example of a FEC encoder 100 that applies a concatenated code, comprising an outer code and an inner code. In this example, the outer code is a block code, and the inner code is a convolutional code. The encoder 100 typically forms a portion of a transmitter configured to communicate information over a communications channel to a receiver. The encoder 100 comprises a block code encoder 102, an interleaver 104, and a convolutional code encoder 106. The input to block code encoder 102 consists of blocks of data. The encoder 102 appends parity information to each block, which is to be used at the receiver for error detection and correction. The interleaver 104 is configured to permute the encoded blocks in order to reduce the impact of the (anticipated) bursty errors introduced by the communication channel. In one configuration, the interleaver 104 is a convolutional interleaver that is configured to interleave the encoded blocks from encoder 102 at the byte level. The convolutional encoder 106 is configured to convolutionally encode the permuted blocks output by the interleaver 104. Typically, this encoding is performed at the bit level and introduces a certain amount of redundancy that is used for error detection and correction. For example, the encoder 106 may be a rate ½ convolutional encoder that substitutes two convolutionally encoded bits for every input but, and thus doubles the size of the encoded blocks, although, with puncturing, the degree of redundancy that is introduced can be reduced.
FIG. 2 illustrates a decoder 200 for decoding the encoded data produced by the encoder 100 after transmission over the communication channel. The decoder 200 typically forms a portion of a receiver. The decoder 200 comprises an inner decoder 202, a de-interleaver 206, and a block code decoder 208. The inner decoder 202, typically a Viterbi decoder, is configured to decode the convolutional encoding applied by the (inner) convolutional encoder 106 in FIG. 1. The output 204 of the inner decoder 202 is input to the de-interleaver 206, which is configured to reverse the permutations introduced by the interleaver 104 . Through this process, the de-interleaver 206 spreads any bursty errors introduced by communication over the communications channel. The data from de-interleaver 206 is input to the block code decoder 208, which is configured to decode the block code encoding applied by the block code encoder 102 of FIG. 1. Therefore, in the case where the block code encoder 102 is a Reed-Solomon encoder, the block code decoder 208 is likewise chosen to be a Reed-Solomon decoder.
The error detection and correction capability of the decoder 200 is typically defined by the amount of parity information appended by the block code encoder 102. In the case where the encoder 102 is a (n, k) Reed-Solomon encoder over GF(256), indicating that the encoder appends n-k bytes of parity information to each k byte block, and the block code decoder 208 is a (n, k) Reed-Solomon decoder, the decoder 200 is able to detect and correct Ldmin/2 errors, where “L” represents the “floor” operator, and dmin=(n−k+1). Thus, for a code where dmin=17, the decoder is able to detect and correct up to 8 errors.
To increase the error detection and correction capability of the decoder 200, various schemes have been proposed, none of which is entirety satisfactory. One approach calls for configuring the inner decoder 202 such that its output 204 is in the form of soft bit estimates rather than hard bit estimates, and also configuring the block code decoder 208, which is typically configured to handle only hard bit estimates, so that it is capable of handling soft bit estimates. See, e.g., M. K. Cheng et al., “Soft-Decision Reed-Solomon Decoding on Partial Response Channels,” GLOBECOM'02—IEEE Global Telecommunications Conference. Conference Record, vol. 2, 2002, pages 1026-30; J. Jiang et al., Iterative Soft-Input Soft-Output Decoding of Reed-Solomon Codes By Adapting the Parity Check Matrix, IEEE Transactions on Information Theory, Vol. 52, No. 8, August 2006, pages 3746-3756. However, while this approach is theoretically able to increase the error detection and correction capability of the decoder 200, it has proven difficult or impossible to implement in practice.